NVR Series High-density Array Connectors

High-Density Array Series Connectors

NVR Series High-density Array Connectors

NVR Series High-density Array Connectors

Artificial intelligence and machine learning (AI/ML) applications are driving the development of new system architectures that require higher speed, frequency bandwidth, frequency and density, as well as scalability and configurability.To address these challenges, Kyomori-Ka offers a range of connector and cable options ideal for supporting next-generation AI/ML applications such as vision system accelerators and array servers; systems and computers on modules; computing platform chipsets; and ultra-low latency products.For designers, Kyomori-Ka provides system-wide optimization support, characterization and development boards, and online design and development tools, leveraging industry-leading expertise in signal integrity design.

The NVR series connectors combine extremely high density with 112 Gbps PAM4 performance per channel, saving 40% more space than traditional arrays.The innovative design of the NVR series connectors combines extremely high density and performance, which is crucial for reducing system size and increasing speed. A fully shielded differential pair design and two reliable contacts enable an industry-leading aggregated data rate of 4.0Tbps. The NVR series connectors are designed not only to operate at 112Gbps PAM4 performance but also to provide a path to 224Gbps. This is possible due to its unique BGA connector architecture, double-point snap-fit contacts on each contact pair, a dedicated differential pair design, and shielding and grounding around each differential pair, enabling 224Gbps performance.

Product Purpose:

5G/LTE Wireless
Remote PHY、MSO
Phased/Digital Array Radar
Test and Measuring Instruments
Low Earth Orbit/Medium Earth Orbit Satellites
Radio Frequency System Chip





Product Specifications

Connector Shape Plug/Socket Baseboard Installation Method
BGA
Installation form Vertical Fit-vertical fit Contact Direction Bottom Contact
Spacing Between Fitting Parts 0.8mm Baseboard Mounting Spacing 0.8mm
Number of Cores 8 Pairs,12 Pairs, 16 Pairs, 24 Pairs, 32 Pairs Terminal Electroplating Gold
Coating Thickness

10~30μm

Electrical Transmission Specifications
Transmission Speed (Reference Value) Supports 56Gbps NRZ/112Gbps PAM4 Body Length (Split Direction)
Body Width (Vertical Direction)
Combination Height 7mm,9mm,10mm,12mm
Rated Voltage(AC)
200V Rated Voltage(DC)
Rated Current

2.1 A(Signal)per needle

9.6 A(Grounded)per pin

Withstand Voltage Value
Impedance Matching
Contact Resistance
Operating Temperature Range(Max) 125 ℃ Operating Temperature Range(Min) -55 ℃
Terminal Arrangement Dual Row RoHS2 Yes
Product Floating Design NO Dual Contact Points No
Product Positioning Pillar Yes Number of Plugs and Unplugs 500
The Product Uses a Suction Cup Cap NO The Product Uses Fire-Retardant Adhesive Paper for Adhesion Yes
Locking Method Auto I-Lock Card Anti-dislodgement Function Yes
Packaging Form Emboss Number of Packages 2000 PCS

Product Order Coding Rules:XXX-XXS-XXX-X-X-X-X-XX
Product Series Product Core Number Terminal Row Number Terminal Plating Specifications Number of Terminal Groups Composition and Type of Welding Ball Material Are There Positioning Posts Packaging Specifications

NVRS:Female;

NVRP:Male

DP=4 pairs  per wafer

02: 2 ROW

03: 3 ROW

04: 4 ROW

05: 5 ROW

06: 6 ROW

S:30µ gold in the contact area & matte tin at the tail

4 ROW

3 ROW

2 ROW

0: No solder balls

1: 63.0% Tin & 37.0% Lead

2: 96.5% Tin, 3.0% Silver, and 0.5% Copper

A:No locating pin

B:Positioning pin

TR: Roll packaging

FR: Full roll quantity with roll packaging


Product Image
Order Number
Production Status
Data Download
Core Spacing [mm]
Connection Method
Fitting Height
Width [mm]
Number Of Cores
Welding Fixing Plate
Operating Temperature Range
High-Speed Transmission
Product Shape
Product Series

Product Features


112 Gbps PAM4 per channel
4.0 Tbps total data rate - 9 IEEE 400G channels
PCIe® 6.0 compatible
The innovative integrated shielded differential pair design achieves::
Extremely low crosstalk (down to 40 GHz)
Strict impedance control
Minimum variance of data rate as stack height increases
112 difference pairs per square inch
40%Compared to traditional arrays with the same data throughput, the space used is reduced by 40%.
It is mounted on the board using ball grid array (BGA) packaging technology to achieve higher density and optimize the routing area.

Two terminals are always available, ensuring a more reliable connection.
Pile-free connection
The signal lost at the first connector will be captured at the second connector.
Achieved 112 Gbps PAM4 rating
The 92Ω solution addresses the problems encountered in applications with 85Ω and 100Ω impedances.



Plating Specifications

Encoding
Terminal contact area
Terminal tail area
RoHS Directive
01+ Au 10µAu 30µ
Si 30µ;   SI-Cu 30µ
Corresponding